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SubjectRe: [PATCH] x86: provide a DMI based port 0x80 I/O delay override.
On 01-01-08 22:42, Christer Weinigel wrote:

> The data sheet for the Intel M8259A says:
> End of /RD to Next Command: 300 ns
> End of /WR to Next Command: 370 ns
> On the other hand, I don't know how all the i8253/i8259 clones or the
> numerous variants of Super I/O chips behave. It wouldn't surprise me
> if some Super I/O chip uses the ISA bus clock to latch the values
> internally so that the delay is dependent on the bus frequency instead.

I wouldn't even be surprised if most all would...


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