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SubjectRe: [PATCH]PCI:disable resource decode in PCI BAR detection
On Thu, Sep 13, 2007 at 02:21:07PM +0800, Shaohua Li wrote:
> We write 0xffffffff to BARs to detect BAR size, this will change BAR
> base to 0xfxxxxxx depends on BAR size. In the bug, PCI MCFG base address
> is 0xf4000000. One PCI device (gfx) has a 256M BAR, the detection code
> will temprarily change it to 0xf0000000, so conflict with MCFG decode
> range. Later memory based config space read/write address is decoded by
> both MCH and gfx and cause a hang. This patch disables resource decode
> in BAR size detection to avoid resource conflict.

You missed the part where we have to avoid doing this for host bridges ...

(I believe it's now queued in Greg's tree, and possibly Andrew's tree

Intel are signing my paycheques ... these opinions are still mine
"Bill, look, we understand that you're interested in selling us this
operating system, but compare it to ours. We can't possibly take such
a retrograde step."
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