Messages in this thread | | | From | Segher Boessenkool <> | Subject | Re: [PATCH 0/24] make atomic_read() behave consistently across all architectures | Date | Tue, 21 Aug 2007 16:48:51 +0200 |
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>> Let me say it more clearly: On ARM, it is impossible to perform atomic >> operations on MMIO space. > > Actually, no one is suggesting that we try to do that at all. > > The discussion about RMW ops on MMIO space started with a comment > attributed to the gcc developers that one reason why gcc on x86 > doesn't use instructions that do RMW ops on volatile variables is that > volatile is used to mark MMIO addresses, and there was some > uncertainty about whether (non-atomic) RMW ops on x86 could be used on > MMIO. This is in regard to the question about why gcc on x86 always > moves a volatile variable into a register before doing anything to it.
This question is GCC PR33102, which was incorrectly closed as a duplicate of PR3506 -- and *that* PR was closed because its reporter seemed to claim the GCC generated code for an increment on a volatile (namely, three machine instructions: load, modify, store) was incorrect, and it has to be one machine instruction.
> So the whole discussion is irrelevant to ARM, PowerPC and any other > architecture except x86[-64].
And even there, it's not something the kernel can take advantage of before GCC 4.4 is in widespread use, if then. Let's move on.
Segher
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