lkml.org 
[lkml]   [2007]   [Aug]   [20]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    Date
    From
    SubjectRe: [PATCH 0/24] make atomic_read() behave consistently across all architectures
    On Tue, Aug 21, 2007 at 01:02:01AM +0200, Segher Boessenkool wrote:
    > >>And no, RMW on MMIO isn't "problematic" at all, either.
    > >>
    > >>An RMW op is a read op, a modify op, and a write op, all rolled
    > >>into one opcode. But three actual operations.
    > >
    > >Maybe for some CPUs, but not all. ARM for instance can't use the
    > >load exclusive and store exclusive instructions to MMIO space.
    >
    > Sure, your CPU doesn't have RMW instructions -- how to emulate
    > those if you don't have them is a totally different thing.

    I thought that ARM's load exclusive and store exclusive instructions
    were its equivalent of LL and SC, which RISC machines typically use to
    build atomic sequences of instructions -- and which normally cannot be
    applied to MMIO space.

    Thanx, Paul
    -
    To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
    the body of a message to majordomo@vger.kernel.org
    More majordomo info at http://vger.kernel.org/majordomo-info.html
    Please read the FAQ at http://www.tux.org/lkml/

    \
     
     \ /
      Last update: 2007-08-21 02:09    [W:4.621 / U:0.008 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site