[lkml]   [2007]   [Aug]   [15]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
    SubjectRe: [PATCH 6/24] make atomic_read() behave consistently on frv
    >>>>> Well if there is only one memory location involved, then smp_rmb()
    >>>>> isn't
    >>>>> going to really do anything anyway, so it would be incorrect to use
    >>>>> it.
    >>>> rmb() orders *any* two reads; that includes two reads from the same
    >>>> location.
    >>> If the two reads are to the same location, all CPUs I am aware of
    >>> will maintain the ordering without need for a memory barrier.
    >> That's true of course, although there is no real guarantee for that.
    > A CPU that did not provide this property ("cache coherence") would be
    > most emphatically reviled.

    That doesn't have anything to do with coherency as far as I can see.

    It's just about the order in which a CPU (speculatively) performs the
    (which isn't necessarily the same as the order in which it executes the
    corresponding instructions, even).

    > So we are pretty safe assuming that CPUs
    > will provide it.

    Yeah, pretty safe. I just don't like undocumented assumptions :-)


    To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
    the body of a message to
    More majordomo info at
    Please read the FAQ at

     \ /
      Last update: 2007-08-15 22:19    [W:0.020 / U:95.568 seconds]
    ©2003-2017 Jasper Spaans. hosted at Digital OceanAdvertise on this site