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Subject[PATCH] pata_hpt37x: Fix 2.6.22 clock PLL regression

Just one version of Linux ago
The PLL code broke - oh no!
But set the right mode
And fix up the code
Makes the PLL timing sync go

Closes-bug: #8791
Signed-off-by: Alan Cox <alan@redhat.com>

diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla-2.6.23rc1/drivers/ata/pata_hpt37x.c linux-2.6.23rc1/drivers/ata/pata_hpt37x.c
--- linux.vanilla-2.6.23rc1/drivers/ata/pata_hpt37x.c 2007-07-23 12:56:11.000000000 +0100
+++ linux-2.6.23rc1/drivers/ata/pata_hpt37x.c 2007-07-23 14:44:39.000000000 +0100
@@ -26,7 +26,7 @@
#include <linux/libata.h>

#define DRV_NAME "pata_hpt37x"
-#define DRV_VERSION "0.6.6"
+#define DRV_VERSION "0.6.7"

struct hpt_clock {
u8 xfer_speed;
@@ -1103,17 +1103,17 @@

/* Select the DPLL clock. */
pci_write_config_byte(dev, 0x5b, 0x21);
- pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low);
+ pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100);

for(adjust = 0; adjust < 8; adjust++) {
if (hpt37x_calibrate_dpll(dev))
break;
/* See if it'll settle at a fractionally different clock */
- if ((adjust & 3) == 3) {
- f_low --;
- f_high ++;
- }
- pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low);
+ if (adjust & 1)
+ f_low -= adjust >> 1;
+ else
+ f_high += adjust >> 1;
+ pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100);
}
if (adjust == 8) {
printk(KERN_WARNING "hpt37x: DPLL did not stabilize.\n");
-
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