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SubjectRe: [PATCH 1/2] [RFC] PCI: read revision ID by default
On Fri, Jun 08, 2007 at 03:46:30PM -0700, Auke Kok wrote:
> Currently there are 97 occurrences where drivers need the pci
> revision ID. We can do this once for all devices. Even the pci
> subsystem needs the revision several times for quirks. The extra
> u8 member pads out nicely in the pci_dev struct.

Good idea. I always wondered why we read the invariants so often
in the code.

>
> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
> ---
>
> drivers/pci/probe.c | 3 +++
> include/linux/pci.h | 1 +
> 2 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index e48fcf0..0fdb71d 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -918,6 +918,9 @@ pci_scan_device(struct pci_bus *bus, int devfn)
> dev->cfg_size = pci_cfg_space_size(dev);
> dev->error_state = pci_channel_io_normal;
>
> + /* read the PCI revision: 1 byte */
> + pci_read_config_byte(dev, PCI_REVISION_ID, &dev->revision);

probe.c:pci_setup_device() is also reading this byte but discards it:
pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
class >>= 8; /* upper 3 bytes */
dev->class = class;

Can you use "class & 0xff"? Or is pci_setup_device() too late?
Or can you read the whole 32-bits in pci_scan_device() and remove
the pci_read_config() in pci_setup_device()?

> +
> /* Assume 32-bit PCI; let 64-bit PCI cards (which are far rarer)
> set this higher, assuming the system even supports it. */
> dev->dma_mask = 0xffffffff;
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index fbf3766..9847936 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -138,6 +138,7 @@ struct pci_dev {
> unsigned short subsystem_vendor;
> unsigned short subsystem_device;
> unsigned int class; /* 3 bytes: (base,sub,prog-if) */
> + u8 revision; /* PCI revision, low byte of class word */

If anyone doesn't want to add this, "class" really only uses 24 bits.
ie could be packed together with revision field like they are in
PCI configuration header.

thanks,
grant

> u8 hdr_type; /* PCI header type (`multi' flag masked out) */
> u8 rom_base_reg; /* which config register controls the ROM */
> u8 pin; /* which interrupt pin this device uses */
-
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