Messages in this thread | | | Date | Tue, 8 May 2007 02:51:30 -0700 | From | Chris Wright <> | Subject | Re: [PATCH] x86-64 highres/dyntick support |
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* Thomas Gleixner (tglx@linutronix.de) wrote: > On Tue, 2007-05-08 at 02:39 -0700, Chris Wright wrote: > > > OK, looks very similar all things considered. One thing I didn't do > > was fix lapic timer calibration (was hoping you'd do that part, and you > > did ;-) I've noticed that something has changed and I'm seeing irq0 > > handled on cpu3 (4 cpu system), where it used to be on cpu0 as expected. > > Strange, irq balancing ?
That's what I was wondering, although i have same setup for 32-bit and it behaves as expected with cpu0 taking hpet or pit on irq0 and lapic timer picked up on the other 3 cpus.
> > In addition lapic timer is firing there, and I'm seeing a higher > > interrupt load than I used to. This is the same in your set and mine. > > Is irq0 _and_ the lapic timer firing ?
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