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SubjectRe: [PATCH -rt] ARM TLB flush fix: don't forget to re-enable preemption
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On Wed, 2007-05-23 at 10:22 +0100, Russell King wrote:
> On Tue, May 22, 2007 at 04:41:36PM -0700, Kevin Hilman wrote:
> > On Tue, 2007-05-22 at 16:25 -0700, Daniel Walker wrote:
> > > On Tue, 2007-05-22 at 16:01 -0700, Kevin Hilman wrote:
> > > > Add a preempt_enable() to flush_tlb_kernel_page() since -rt4 patch
> > > > adds a preempt_disable but no preempt_enable().
> > > >
> > > > Signed-off-by: Kevin Hilman <khilman@mvista.com>
> > > >
> > > >
> > > > ---
> > > > include/asm-arm/tlbflush.h | 1 +
> > > > 1 file changed, 1 insertion(+)
> > > >
> > > > Index: linux-2.6.21/include/asm-arm/tlbflush.h
> > > > ===================================================================
> > > > --- linux-2.6.21.orig/include/asm-arm/tlbflush.h
> > > > +++ linux-2.6.21/include/asm-arm/tlbflush.h
> > > > @@ -378,6 +378,7 @@ static inline void local_flush_tlb_kerne
> > > > asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc");
> > > > if (tlb_flag(TLB_V6_I_PAGE))
> > > > asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc");
> > >
> > > Aren't these mcr operations atomic?
> > >
> >
> > Individually, yes. But the point of the preempt_disable/enable is to
> > make the whole sequence atomic.
>
> In which case shouldn't it be at the end of the function so it includes
> the write buffer handling as well?
>
> However, I think I agree with Daniel on this one. I don't see the point
> of the preempt_disable() here.

Note that my patch simply adds an enable to match the disable added by
the -rt patch. I'm not sure where the disable originally came from, but
there are disable/enable pairs scattered throughout tlbflush.h in the
-rt patch.

If this one isn't necessary, then the others probably are not either.
In most cases there are 2 mcr instructions inside the critical section.
One for the dsb() and the other for the actual function.

Russell, is there a reason any of these sections should be atomic?

Kevin




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