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SubjectRe: [PATCH 1/2] Define percpu smp cacheline align interface
On Mon, 7 May 2007 15:58:41 -0700
Fenghua Yu <fenghua.yu@intel.com> wrote:

> On Fri, May 04, 2007 at 05:12:18PM -0700, Fenghua Yu wrote:
> >
> > Define percpu smp cacheline align interface
>
> This is updated patch. Per cpu cacheline aligned data section name and macro name are changed to have better code understanding.
>
> The patches place all of smp cacheline aligned percpu data into .data.percpu.shared_cacheline_aligned. Other percpu data is still in data.percpu section. The patches can reduce cache line access in SMP and reduce alignment gap waste. The patches also define PERCPU macro for vmlinux.lds.S for concise code.
>
> PATCH 1/2: Define percpu smp cacheline align interface
> PATCH 2/2: Call percpu smp cacheline algin interface

For some reason arm exploded.

/opt/crosstool/gcc-3.4.5-glibc-2.3.6/arm-unknown-linux-gnu/bin/arm-unknown-linux-gnu-ld:arch/arm/kernel/vmlinux.lds:327: parse error

__con_initcall_start = .;
*(.con_initcall.init)
__con_initcall_end = .;
__security_initcall_start = .;
*(.security_initcall.init)
__security_initcall_end = .;

. = ALIGN(32);
__initramfs_start = .;
usr/built-in.o(.init.ramfs)
__initramfs_end = .;

. = ALIGN(4096); __per_cpu_start = .; .data.percpu : AT(ADDR(.data.percpu) - 0) { *(.data.percpu) *(.data.percpu.shared_cacheline_aligned) } __per_cpu_end = .;






}

Seems I don't have the latest version any more so I'll drop it.
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