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SubjectRe: [patch 1/5] powerpc 2.6.21-rt1: add mcount() and _mcount()

add mcount() and _mcount() for latency trace support.

Signed-off-by: Tsutomu OWA <tsutomu.owa@toshiba.co.jp>
-- owa

diff -rup linux-2.6.21-rt1/arch/powerpc/kernel/entry_64.S rt/arch/powerpc/kernel/entry_64.S
--- linux-2.6.21-rt1/arch/powerpc/kernel/entry_64.S 2007-05-07 14:08:12.000000000 +0900
+++ rt/arch/powerpc/kernel/entry_64.S 2007-05-08 18:54:07.000000000 +0900
@@ -832,3 +832,63 @@ _GLOBAL(enter_prom)
ld r0,16(r1)
mtlr r0
blr
+
+#ifdef CONFIG_MCOUNT
+/*
+ * code almost taken from entry_32.S
+ */
+#define MCOUNT_FRAME_SIZE 32
+_GLOBAL(mcount)
+ stdu r1,-MCOUNT_FRAME_SIZE(r1)
+ mflr r3
+
+ LOAD_REG_ADDR(r5,mcount_enabled)
+ lwz r5,0(r5)
+ std r3,MCOUNT_FRAME_SIZE+16(r1)
+ cmpwi r5,0
+ beq 1f
+
+ /* r3 contains lr (eip), put parent lr (parent_eip) in r4 */
+ ld r4,MCOUNT_FRAME_SIZE(r1)
+ ld r4,16(r4)
+ bl .__trace
+ nop
+1:
+ ld r0,MCOUNT_FRAME_SIZE+16(r1)
+ mtlr r0
+ addi r1,r1,MCOUNT_FRAME_SIZE
+ blr
+
+/*
+ * Based on glibc-2.4/sysdeps/powerpc/powerpc64/ppc-mcount.S
+ *
+ * We don't need to save the parameter-passing registers as gcc takes
+ * care of that for us. Thus this function looks fairly normal.
+ * In fact, the generic code would work for us.
+ */
+_GLOBAL(_mcount)
+ /* return if we're in real mode. */
+ mfmsr r3
+ andi. r0,r3,MSR_IR|MSR_DR /* see if relocation is on? */
+ beqlr /* if not, do nothing. */
+ /* we're in translation mode. keep going. */
+ mflr r3
+ ld r11,0(r1) /* load back chain ptr */
+ stdu r1,-STACK_FRAME_OVERHEAD(r1)
+ std r3,STACK_FRAME_OVERHEAD+16(r1)
+ ld r4,16(r11) /* LR in back chain */
+ LOAD_REG_ADDR(r5,mcount_enabled)
+ lwz r5,0(r5)
+ cmpwi r5,0 /* see if mcount_enabled? */
+ beq 1f /* if disabled, then skip */
+
+ /* r3 contains lr (eip), put parent lr (parent_eip) in r4 */
+ bl .__trace
+ nop
+1:
+ ld r0,STACK_FRAME_OVERHEAD+16(r1) /* restore saved LR */
+ mtlr r0
+ addi r1,r1,STACK_FRAME_OVERHEAD
+ blr
+
+#endif /* CONFIG_MCOUNT */
-
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