lkml.org 
[lkml]   [2007]   [Mar]   [5]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    Date
    From
    SubjectRe: [PATCH -mm 1/5] Blackfin: blackfin architecture patch update
    Paul Mundt wrote:
    >> +comment "Memory Optimizations"
    >> +
    >> +config I_ENTRY_L1
    >> + bool "Locate interrupt entry code in L1 Memory"
    >> + default y
    >> + help
    >> + If enabled interrupt entry code (STORE/RESTORE CONTEXT) is linked
    >> + into L1 instruction memory.(less latency)
    >> +
    > Wow, this is really crying out for a special linker section with slightly
    > more intelligent relocation logic. You should flag the performance
    > critical parts to be located in L1 memory directly with a section
    > attribute, rather than making everything selectable. If you overflow you
    > can simply spill in to main memory.

    This is done intentionally, because it's also possible for user code to
    be loaded into L1 memory. We want to give users the option to avoid
    filling it all up with kernel code.


    Bernd
    --
    This footer brought to you by insane German lawmakers.
    Analog Devices GmbH Wilhelm-Wagenfeld-Str. 6 80807 Muenchen
    Registergericht Muenchen HRB 40368
    Geschaeftsfuehrer Thomas Wessel, Vincent Roche, Joseph E. McDonough
    -
    To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
    the body of a message to majordomo@vger.kernel.org
    More majordomo info at http://vger.kernel.org/majordomo-info.html
    Please read the FAQ at http://www.tux.org/lkml/

    \
     
     \ /
      Last update: 2007-03-05 13:53    [W:0.021 / U:60.036 seconds]
    ©2003-2016 Jasper Spaans. hosted at Digital OceanAdvertise on this site