[lkml]   [2007]   [Mar]   [5]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: [PATCH -mm 1/5] Blackfin: blackfin architecture patch update
On Mon, Mar 05, 2007 at 01:32:07PM +0100, Bernd Schmidt wrote:
> Paul Mundt wrote:
> >>+comment "Memory Optimizations"
> >>+
> >>+config I_ENTRY_L1
> >>+ bool "Locate interrupt entry code in L1 Memory"
> >>+ default y
> >>+ help
> >>+ If enabled interrupt entry code (STORE/RESTORE CONTEXT) is linked
> >>+ into L1 instruction memory.(less latency)
> >>+
> >Wow, this is really crying out for a special linker section with slightly
> >more intelligent relocation logic. You should flag the performance
> >critical parts to be located in L1 memory directly with a section
> >attribute, rather than making everything selectable. If you overflow you
> >can simply spill in to main memory.
> This is done intentionally, because it's also possible for user code to
> be loaded into L1 memory. We want to give users the option to avoid
> filling it all up with kernel code.
So then why not make the userspace component of it optional and allow a size
cap for kernel usage that's configurable if it's enabled? This degree of
abstraction is almost worse than no abstraction.
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to
More majordomo info at
Please read the FAQ at

 \ /
  Last update: 2007-03-05 13:45    [W:0.051 / U:7.928 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site