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SubjectRe: exposing FSB clock speed in /sys
Andi,

On Sat, Mar 31, 2007 at 04:31:29AM +0200, Andi Kleen wrote:
> Stephane Eranian <eranian-sDzT885Ts8HQT0dZR+AlfA@public.gmane.org> writes:
>
> > It seems that the kernel does not expose the Front-Side Bus (FSN) Clock
> > speed to user applications.
>
> You mean the APIC timer frequency which happens to match the FSB
> on some CPUs?

Well, I am talking about the bus that connects the processor socket to the
chipset on Intel machines. On Intel Core 2 Duo (aka Woodcrest), you have
2 sockets, thus two buses connecting to the chipset which then connects
to the memory (among other things).

The Woodcrest (Intel Core PMU) is capable of measuring the number of bus
transactions to memory (look at the BUS_* events). You can count per core
or for the entire socket (both cores). In order to know if you saturate
the bus (from socket to chipset), you need to know the theoretical peak
number of transactions the bus can sustain. For that you need to bus
frequency.

I am not interested in older processors, but I think for all recent Intel
processors, there is a fairly simple algorithm to get the frequency using
a couple of MSRs (including MSR_IA32_EBL_CR_POWERON or MSR_FSB_FREQ).

Don't we already have /sys entries that exits only for certain processors
or platforms?

I think the Opteron have HYPERTRANSPORT-related events which could be used
to obtain similar metrics.

Knowledge of bus saturation is important for multi-core programming.

>
> > Knowledge the the FSB speed is very useful to monitoring tools. It is used
> > to compute certain bus-related metrics.
>
> Can you describe those metrics in detail?
>
> -Andi

--

-Stephane
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