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SubjectRe: [PATCH 2.6.21-rc5] MSI: read-flush MSI-X table
On Mon, Mar 26, 2007 at 04:18:22PM -0700, Mitch Williams wrote:
> This patch fixes a kernel bug which is triggered when using the
> irqbalance daemon with MSI-X hardware.
>
> Because both MSI-X interrupt messages and MSI-X table writes are posted,
> it's possible for them to cross while in-flight. This results in
> interrupts being received long after the kernel thinks they're disabled,
> and in interrupts being sent to stale vectors after rebalancing.
>
> This patch performs a read flush after writes to the MSI-X table for
> enable/disable and rebalancing operations.

Why wouldn't MSI have the same problems as MSI-X?

...
> diff -urpN -X dontdiff linux-2.6.21-rc4-clean/drivers/pci/msi.c linux-2.6.21-rc4/drivers/pci/msi.c
> --- linux-2.6.21-rc4-clean/drivers/pci/msi.c 2007-03-19 16:16:32.000000000 -0700
> +++ linux-2.6.21-rc4/drivers/pci/msi.c 2007-03-21 12:44:51.000000000 -0700
> @@ -68,6 +68,29 @@ static void msix_set_enable(struct pci_d
> }
> }
>
> +void msix_flush_writes(unsigned int irq)
> +{
> + struct msi_desc *entry;
> +
> + entry = get_irq_msi(irq);
> + BUG_ON(!entry || !entry->dev);
> + switch (entry->msi_attrib.type) {
> + case PCI_CAP_ID_MSI:
> + /* nothing to do */
> + break;
> + case PCI_CAP_ID_MSIX:
> + {
> + int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
> + PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
> + readl(entry->mask_base + offset);
> + break;
> + }
> + default:
> + BUG();
> + break;
> + }
> +}

PCI_CAP_ID_MSI case seems wrong to me.
I was expecting a readl() in that case as well.

thanks,
grant
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