Messages in this thread | | | Date | Sun, 30 Dec 2007 16:23:20 -0800 | From | "H. Peter Anvin" <> | Subject | Re: [PATCH] x86: provide a DMI based port 0x80 I/O delay override |
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David P. Reed wrote: > Alan Cox wrote: >>> Now what's interesting is that the outb to port 80 is *faster* than >>> an outb to an unused port, on my machine. So there's something there >>> - actually accepting the bus transaction. In the ancient 5150 PC, >>> 80 was >> >> Yes and I even told you a while back how to verify where it is. From the >> timing you get its not on the LPC bus but chipset core so pretty >> certainly an SMM trap as other systems with the same chipset don't have >> the bug. Probably all that is needed is a BIOS upgrade >> >> > Actually, I could see whether it was SMM trapping due to AMD MSR's that > would allow such trapping, performance or debug registers. Nothing was > set to trap with SMI or other traps on any port outputs. But I'm > continuing to investigate for a cause. It would be nice if it were a > BIOS-fixable problem. It would be even nicer if the BIOS were GPL...
If it was an SMM trap, I would expect it to be trapped in the SuperIO chip.
-hpa
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