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SubjectRe: [PATCH] x86: Voluntary leave_mm before entering ACPI C3

* Venki Pallipadi <venkatesh.pallipadi@intel.com> wrote:

> Aviod TLB flush IPIs during C3 states by voluntary leave_mm() before
> entering C3.
>
> The performance impact of TLB flush on C3 should not be significant
> with respect to C3 wakeup latency. Also, CPUs tend to flush TLB in
> hardware while in C3 anyways.
>
> On a 8 logical CPU system, running make -j2, the number of tlbflush
> IPIs goes down from 40 per second to ~ 0. Total number of interrupts
> during the run of this workload was ~1200 per second, which makes it
> ~3% savings in wakeups.
>
> There was no measurable performance or power impact however.

thanks, applied to x86.git. Nice and elegant patch!

Btw., since the TLB flush state machine is really subtle and fragile,
could you try to run the following mmap stresstest i wrote some time
ago:

http://redhat.com/~mingo/threaded-mmap-stresstest/

for a couple of hours. It runs nr_cpus threads which then do a "random
crazy mix" of mappings/unmappings/remappings of a 800 MB memory window.
The more sockets/cores, the crazier the TLB races get ;-)

Ingo


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