Messages in this thread | | | Date | Thu, 13 Dec 2007 10:24:24 +0000 | From | Alan Cox <> | Subject | Re: Possible issue with dangling PCI BARs |
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> So disabling memory or IO decode in a command register seems to be > the only safe option. This depends on architecture, though.
You are assuming a degree of sanity that seems unwise (at least for PC class hardware).
Whether a given BAR is decoded depends not only on the contents of the BAR but also the hardware configuration *specific* to the device.
The SIL680 for example has an MMIO BAR at BAR5. Control for that BAR is via MMIO_EN which is a bit in PCI config register 0x8A.
So if we disable the device because of a dangling BAR the users root file system goes away. If we leave it as is we have to know the firmware/hardware came up with that BAR disabled or how to control it at a per device level.
Supporting pci_enable_device_io / pci_enable_device_mmio / pci_iomap_io / pci_iomap_mmio seems to cover pretty much all the use cases we have.
The users we have right now that are:
- pata_cs5520 (can be dealt with easily) - old IDE (with the new resource handling for legacy IDE can use pci_enable_device_io I think, ditto pci/cs5520) - scx200_acb (looks like a simple substitution works) - lpfc pci_enable_device_mmio - qla2xxx pci_enable_device ? (enables IO and MMIO)
Alan
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