Messages in this thread | | | From | Ondrej Zary <> | Subject | Re: RFC: outb 0x80 in inb_p, outb_p harmful on some modern AMD64 with MCP51 laptops | Date | Mon, 10 Dec 2007 19:02:52 +0100 |
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On Monday 10 December 2007 12:30:53 Krzysztof Halasa wrote: > Rene Herman <rene.herman@keyaccess.nl> writes: > > Alan, did you double-check that 8 us? I tried to but I seem to not > > have trustworthy documentation. > > I remember 16-bit CPU-driven ISA was able to do 2-3 MB/s transfers, > that means at least 1 Maccesses/second = up to 1 microsecond/access.
Hard disk is limited to about 2 MB/s when connected through ISA controller, IIRC. That's 16-bit PIO transfer.
> Perhaps IO ports accesses were slower than memory? But 8-12 times? > Perhaps port 0x80 was using (slower) 8-bit timings? > > Bus-mastering ISA cards were able to do ca. 5 MB/s with 8 MHz (10 MHz?) > clocking, some old machines didn't like it.
Yes, ISA clock can be changed on many machines. Most cards run fine even at 11 (33/3) MHz with zero wait states. In fact, I haven't seen any card that did not.
> Googling suggests that a slave access on 8-bit ISA bus was taking > 6 cycles by default (including 4 wait states), 16-bit - 3 cycles > (with 1 WS). Respectively 0.75 us and 0.375 us, and 0.25 us for > 16-bit 0WS memory access (with standard 8 MHz clock). > > These values could be changed with BIOS setup, and devices could > use 0WS or I/O CHRDY signals if they didn't like the defaults > (dir 0WS mean 1 WS for 8-bit devices?).
-- Ondrej Zary
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