lkml.org 
[lkml]   [2007]   [Nov]   [20]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    Date
    From
    SubjectRe: [patch][v2] x86, ptrace: support for branch trace store(BTS)
    On Tue, 20 Nov 2007, Metzger, Markus T wrote:

    > +__cpuinit void ptrace_bts_init_intel(struct cpuinfo_x86 *c)
    > +{
    > + switch (c->x86) {
    > + case 0x6:
    > + switch (c->x86_model) {
    > +#ifdef __i386__
    > + case 0xD:
    > + case 0xE: /* Pentium M */
    > + ptrace_bts_ops = ptrace_bts_ops_pentium_m;
    > + break;
    > +#endif /* _i386_ */
    > + case 0xF: /* Core2 */
    > + ptrace_bts_ops = ptrace_bts_ops_core2;
    > + break;
    > + default:
    > + /* sorry, don't know about them */
    > + break;
    > + }
    > + break;
    > + case 0xF:
    > + switch (c->x86_model) {
    > +#ifdef __i386__
    > + case 0x0:
    > + case 0x1:
    > + case 0x2:
    > + case 0x3: /* Netburst */
    > + ptrace_bts_ops = ptrace_bts_ops_netburst;
    > + break;
    > +#endif /* _i386_ */
    > + default:
    > + /* sorry, don't know about them */
    > + break;
    > + }
    > + break;

    is this right? i thought intel family 15 models 3 and 4 supported amd64
    mode...

    -dean
    -
    To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
    the body of a message to majordomo@vger.kernel.org
    More majordomo info at http://vger.kernel.org/majordomo-info.html
    Please read the FAQ at http://www.tux.org/lkml/

    \
     
     \ /
      Last update: 2007-11-20 16:29    [W:0.040 / U:0.936 seconds]
    ©2003-2016 Jasper Spaans. hosted at Digital OceanAdvertise on this site