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SubjectRe: [rfc 00/45] [RFC] CPU ops and a rework of per cpu data handling on x86_64
On Mon, 19 Nov 2007, David Miller wrote:

> Although we have a per-cpu area base in a fixed global register
> for addressing, the above isn't beneficial on sparc64 because
> the atomic is much slower than doing a:
> local_irq_disable();
> nonatomic_percpu_memory_op();
> local_irq_enable();
> local_irq_{disable,enable}() together is about 18 cycles.
> Just the cmpxchg() part of the atomic sequence is at least
> 32 cycles and requires a loop:
> while (1) {
> x = ld();
> if (cmpxchg(x, op(x)))
> break;
> }
> which bloats up the atomic version even more.

In that case the generic fallbacks can just provide what you already have.

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