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    SubjectRe: SCSI breakage on non-cache coherent architectures
     > I've been debugging various issues on the PowerPC 44x embedded
    > architecture which happens to have non-coherent PCI DMA.
    > One of the problem I'm hitting is that one really need to enforce
    > kmalloc alignement to cache lines or bad things will happen (among
    > others with USB), for some reasons, powerpc failed to do so, I fixed it.

    Heh... I hit the same problem literally 5 years ago:

    I implemented the __dma_buffer annotation:

    But DaveM said we should just use the PCI pool code instead:

    - R.
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