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    SubjectRe: 2.6.18-rc5-mm1: drivers/infiniband/hw/amso1100/c2.c compile error
        Andrew> It depends on how many other devices have (or are expected
    Andrew> to have) mthca-like requirements. If the answer is "very
    Andrew> few, maybe none" then perhaps we don't need to go
    Andrew> designing generic interfaces to support such things.

    I actually don't know of any others -- not that I'm an expert on the
    range of devices that exist...

    What's your feeling about drivers like amso1100, which don't
    particularly care about atomicity, but just want to write a 64-bit
    quantity conveniently? Should we require writeq()/__raw_writeq() for
    all archs, and then define CONFIG_ARCH_HAS_64BIT_ATOMIC_MMIO_WRITES as

    I see stuff like this is drivers/dma/ioatdma.c:

    #if (BITS_PER_LONG == 64)
    ioatdma_chan_write64(ioat_chan, IOAT_CHAINADDR_OFFSET, desc->phys);
    (u32) desc->phys);
    ioatdma_chan_write32(ioat_chan, IOAT_CHAINADDR_OFFSET_HIGH, 0);

    and drivers/char/hpet.c:

    #ifndef readq
    static inline unsigned long long readq(void __iomem *addr)
    return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);

    #ifndef writeq
    static inline void writeq(unsigned long long v, void __iomem *addr)
    writel(v & 0xffffffff, addr);
    writel(v >> 32, addr + 4);

    and so on...

    - R.

    VGER BF report: H 0
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      Last update: 2006-09-02 00:45    [W:0.021 / U:0.536 seconds]
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