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SubjectRe: [spi-devel-general] [Patch] Add spi full duplex mode transfer support
On Wed, 2006-08-30 at 16:07 +0530, Manish Jaggi wrote:
> On the same lines can we have a member in spi_transfer structure
> like bUseDMA.
> In spi PIO mode for short writes of 2 to 8 words is better.
> And we use DMA for larger writes/reads
This capability is built into the pxa2xx_spi driver.

Excerpt from linux/Documentation/spi/pxa2xx:

The pxa2xx_spi driver support both DMA and interrupt driven PIO message
transfers. The driver defaults to PIO mode and DMA transfers must
enabled by setting the "enable_dma" flag in the "pxa2xx_spi_master"
structure and and ensuring that the "pxa2xx_spi_chip.dma_burst_size"
field is non-zero. The DMA mode support both coherent and stream based
DMA mappings.

The following logic is used to determine the type of I/O to be used on
a per "spi_transfer" basis:

if !enable_dma or dma_burst_size == 0 then
always use PIO transfers

if spi_message.is_dma_mapped
and rx_dma_buf != 0 and tx_dma_buf != 0 then
use coherent DMA mode

if rx_buf and tx_buf are aligned on 8 byte boundary then
use streaming DMA mode

use PIO transfer

By enabling DMA tranfers, clearing the spi_message.is_dma_mapped and
providing transfer buffer NOT aligned on 8 byte boundary forced PIO mode
will transfer buffers aligned on 8 byte boundary forces a DMA mode.

My experiance has shown the most stack allocated transfer buffers are
not 8 byte aligned and thus use PIO mode.


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