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SubjectRe: PPC kernel panics while doing insmod (store fault with d cbst in icache_flush_range)
Kallol Biswas writes:

> mr r6,r3
> 1: dcbst 0,r3
> addi r3,r3,L1_CACHE_LINE_SIZE
> bdnz 1b
> The instruction takes a store fault (DST bit, bit 8 of ESR gets
> set), kernel panics with oops (signal 11).

What processor are you using?

Which instruction takes a store fault?

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