Messages in this thread | | | Date | Fri, 11 Aug 2006 11:08:32 +0000 | From | "gmu 2k6" <> | Subject | Re: Only 3.2G ram out of 4G seen in an i386 box |
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On 8/10/06, Simen Thoresen <simentt@dolphinics.no> wrote: > gmu 2k6 wrote: > ... > > so what does it mean that one of Xeons here shows me the full 4GiB as > > total physical memory via `free`? > > > > btw, the box I'm getting will have the 975X chip and include 4GiB RAM > > and if I understood the problem correctly even with 3GiB there will be > > some memory lost to mapping-issues besides the HI/LO mem > > kernel-reserving issue. > > this is what I get on ia32 P4 with 3GiB > > total used free shared buffers cached > > Mem: 3116108 2608196 507912 0 246652 2039708 > > and this is what I get on ia32 Xeon with 4GiB > > total used free shared buffers cached > > Mem: 4087660 268828 3818832 0 57168 103568 > > Hi Gmu, > > This is a bit divergent from the discussion, but will hopefully provide some > background. > > The hardware my employer manufactures asks the BIOS to reserve several > largeish ranges (16M and 16M to 512M), and it's been used in various HPC > projects where machines typically have a lot of memory installed. > > From my experience, most pre 750x-P4-Xeon chipsets did not support any kind > of memory remapping, so often the top 0.5-1.5G of ram would be 'lost'. Great > fun. > Since then, this functionality has started appearing, more or less randomly. > I believe it should be present on all later 75xx chipsets (probably the Core > 2 Xeon chipsets as well), but implementation depends on the BIOS (ie the > motherboard vendors), and their grasp of what people do with their boards is > often quite limited. > > On the P4 boards (and again the Core 2 boards as well), this is probably > even less ordered as they are 'desktop' boards rather than the more costly > 'server' boards. > > I'm pretty sure the Athlon64 and Opteron CPUs should support this, but they > too depend on BIOS functionality to rearrange the memory tables. > > Just out of interest - what chipset does your Xeon system use?
lspci of the P4 32bit desktop with 3GiB 00:00.0 Host bridge: Intel Corporation 82875P/E7210 Memory Controller Hub (rev 02) 00:01.0 PCI bridge: Intel Corporation 82875P Processor to AGP Controller (rev 02) 00:1d.0 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #1 (rev 02)
lspci of the Xeon 32bit HP Proliant Server with 4GiB: 00:00.0 Host bridge: Intel Corporation E7520 Memory Controller Hub (rev 0c) 00:02.0 PCI bridge: Intel Corporation E7525/E7520/E7320 PCI Express Port A (rev 0c) 00:06.0 PCI bridge: Intel Corporation E7520 PCI Express Port C (rev 0c) 00:1d.0 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #1 (rev 02)
lspci of the new box with 975X and Core 2 Duo not available yet for obvious reasons (I don't have the the box yet). - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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