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SubjectI2C SMBUS problem
Hi all,

I'm writing a driver for ADI's chip AD7142, the following is the
single register I2C write operation of it:

[Write]

(s)-(6-BIT device addr )-(W)-(ACK)- \
(register addr[15:8])-(ACK)- \
(register addr[7:0])-(ACK)- \
(Write Data[15:8])-(ACK)- \
(Write Data[7:0])-(ACK)-(P)

I found it does not match any mode of the existing SMBUS specs.
Because the number of the internal register exceeds 8-bit(approximate
600), the register address(command field) needs 2-byte.

In the kernel, I found the doc about it. part of it is here:
./Documentation/i2c/smbus-protocal

I2C Block Read (2 Comm bytes)
=============================

This command reads a block of bytes from a device, from a
designated register that is specified through the two Comm bytes.

S Addr Wr [A] Comm1 [A] Comm2 [A]
S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P


I2C Block Write
===============

The opposite of the Block Read command, this writes bytes to
a device, to a designated register that is specified through the
Comm byte. Note that command lengths of 0, 2, or more bytes are
supported as they are indistinguishable from data.

S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P
==============================

As the doc mentioned, the [Comm] field can be 2 or more bytes. But
this does not match the I2C driver code, see the file
"drivers/i2c/i2c-core.c"
===============================================
s32 i2c_smbus_read_i2c_block_data(struct i2c_client *client, u8
command, u8 *values)
s32 i2c_smbus_write_i2c_block_data(struct i2c_client *client, u8 command,
u8 length, u8 *values)

The type of the parameter [command] of these two routines are "u8", I
think that means you can't pass 2 or more bytes command to the
routine.

So this is my problem. Did I missing something?

I may need to modify the common I2C SMBUS driver and finalize my chip
driver. I want to know if it's acceptable.

Thanks for your hints and suggestions,

Regards,
-Aubrey
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