Messages in this thread | | | From | Jesse Barnes <> | Subject | Re: [PATCH] Define wc_wmb, a write barrier for PCI write combining | Date | Tue, 28 Feb 2006 09:11:36 -0800 |
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On Tuesday, February 28, 2006 8:08 am, Jes Sorensen wrote: > Roland Dreier wrote: > > Jes> Could you explain why the current mmiowb() API won't > > suffice Jes> for this? It seems that this is basically trying to > > achieve Jes> the same thing. > > > > I don't believe mmiowb() is at all the same thing. mmiowb() is all > > about ordering writes between _different_ CPUs without incurring the > > cost of flushing posted writes by issuing a read on the bus. > > Not quite correct as far as I understand it. mmiowb() is supposed to > guarantee that writes to MMIO space have completed before continuing. > That of course covers the multi-CPU case, but it should also cover the > write-combining case.
It only guarantees that any outstanding writes will hit the device before any subsequent writes. mmiowb() doesn't make any guarantees about when the data will actually arrive at the device though.
> I wary of adding yet another variation unless there is a clear > distinction between them that is easy to understandn for driver > authors.
I think that's a valid concern, there are so many ill-understood barriers floating around; adding another one will create even more confusion. Are they all documented somewhere? Are we sure that we don't have duplicates?
At any rate, any new ones we add should be very well documented (I think Andi suggested this implicitly when he asked for the semantics to be well-defined).
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