Messages in this thread | | | Subject | Re: [PATCH] Define wc_wmb, a write barrier for PCI write combining | From | Roland Dreier <> | Date | Tue, 28 Feb 2006 07:42:52 -0800 |
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Jes> Could you explain why the current mmiowb() API won't suffice Jes> for this? It seems that this is basically trying to achieve Jes> the same thing.
I don't believe mmiowb() is at all the same thing. mmiowb() is all about ordering writes between _different_ CPUs without incurring the cost of flushing posted writes by issuing a read on the bus. wc_wmb() would just act like a true wmb(), even when using write-combining regions on x86 -- in other words, there would be no cross-CPU synchronization.
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