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SubjectRe: r8169 mac address change (was Re: [0/3] 2.6.19-rc2: known regressions)]
Riku Voipio <> :
> I took 2.6.19-rc5 as there was no changes in this driver relative to -rc4.
> applied Francois's 0001-r8169-perform-a-PHY-reset.. and finally the
> patch in this mail. And networking _does_not_ work on Thecus N2100.

It sucks.

Can you try against 2.6.18-rc4 the patch at:

If it does not work, apply on top of 2.6.18-rc4 the serie available at:
plus the attached patch.

From 20f33886d041e00cde9c6339ff4d724d992c99bc Mon Sep 17 00:00:00 2001
From: Francois Romieu <>
Date: Mon, 11 Sep 2006 20:10:58 +0200
Subject: [PATCH] r8169: quirk for the 8110sb on arm platform

Inverting the write ordering of the TxDescAddr{High/Low} registers
suffices to trigger a sabbat of PCI errors which make the device
completely dysfunctional. The issue has not been reported on a
different platform.

Switching from MMIO accesses to I/O ones as done in Realtek's
own driver fixes (papers over ?) the bug as well but I am not
thrilled to see everyone pay the I/O price for an obscure bug.

This is the minimal change to handle the issue.

Signed-off-by: Francois Romieu <>
Reported-by: Lennert Buytenhek <>
drivers/net/r8169.c | 9 +++++++--
1 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 7ab79db..582b116 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -1868,10 +1868,15 @@ rtl8169_hw_start(struct net_device *dev)
RTL_W16(IntrMitigate, 0x0000);

- RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
+ /*
+ * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
+ * register to be written before TxDescAddrLow to work.
+ * Switching from MMIO to I/O access fixes the issue as well.
+ */
RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
- RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
+ RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
+ RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
RTL_W8(Cfg9346, Cfg9346_Lock);

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