Messages in this thread | | | Date | Tue, 21 Nov 2006 23:04:41 +0300 | From | Oleg Nesterov <> | Subject | Re: [patch] cpufreq: mark cpufreq_tsc() as core_initcall_sync |
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On 11/20, Alan Stern wrote: > > On Mon, 20 Nov 2006, Oleg Nesterov wrote: > > > So, if we have global A == B == 0, > > > > CPU_0 CPU_1 > > > > A = 1; B = 2; > > mb(); mb(); > > b = B; a = A; > > > > It could happen that a == b == 0, yes? > > Both CPUs execute their "mb" instructions. The mb forces each > cache to wait until it receives an Acknowdgement for the > Invalidate it sent. > > Both caches send an Acknowledgement message to the other. The > mb instructions complete. > > "b = B" and "a = A" execute. The caches return A==0 and B==0 > because they haven't yet invalidated their cache lines. > > The reason the code failed is because the mb instructions didn't force > the caches to wait until the Invalidate messages in their queues had been > fully carried out (i.e., the lines had actually been invalidated).
However, from http://marc.theaimsgroup.com/?l=linux-kernel&m=113435711112941
Paul E. McKenney wrote: > > 2. rmb() guarantees that any changes seen by the interconnect > preceding the rmb() will be seen by any reads following the > rmb(). > > 3. mb() combines the guarantees made by rmb() and wmb().
Confused :(
Oleg.
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