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SubjectRe: [PATCH] large pci adress space in pci/probe.c for linux-2.6.18
On 11/20/06, yadviga <> wrote:
> This is a request from Cisco to update pci address space for 64-bit mips
> Cavium Octeon.
> The size returned by a 4GB or greater sized BAR register returns zero
> which made the algorithm in pci_read_bases() hit a continue instead of
> continuing to read the upper 32-bits of the address space. I needed to
> add the code to check if it was a 64-bit memory space by checking the
> relevant lower bits, in which case the lower 32-bits of the size are
> 0xffffffff by the way they calculate size. As far as I can tell this has
> still not been fixed in the latest release of Linux which is 2.6.18. I
> guess no one has
> encountered such a large BAR register yet.

There is one version and it is G HK tree. and Adrew has cleaned that code.

for AMD K8 system with co-processor installed in opteron socket, the
co-processor may have 4G above ram installed.

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