Messages in this thread | | | Date | Sat, 03 Sep 2005 07:47:48 +1000 | From | Nick Piggin <> | Subject | Re: [PATCH 2.6.13] lockless pagecache 2/7 |
| |
David S. Miller wrote: > From: Nick Piggin <nickpiggin@yahoo.com.au> > Date: Sat, 03 Sep 2005 07:22:18 +1000 > > >>This atomic_cmpxchg, unlike a "regular" cmpxchg, has the advantage >>that the memory altered should always be going through the atomic_ >>accessors, and thus should be implementable with spinlocks. >> >>See for example, arch/sparc/lib/atomic32.c >> >>At least, that's what I'm hoping for. > > > Ok, as long as the rule is that all accesses have to go > through accessor macros, it would work. This is not true > for existing uses of cmpxchg() btw, userland accesses shared > locks with the kernel would using any kind of accessors we > can control. > > This means that your atomic_cmpxchg() cannot be used for locking > objects shared with userland, as DRM wants, since the hashed spinlock > trick does not work in such a case. >
So neither could currently supported atomic_t ops be shared with userland accesses?
Then I think it would not be breaking any interface rule to do an atomic_t atomic_cmpxchg either. Definitely for my usage it will not be shared with userland.
Thanks, Nick
-- SUSE Labs, Novell Inc.
Send instant messages to your online friends http://au.messenger.yahoo.com
- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
| |