Messages in this thread | | | Subject | Re: question on memory barrier | From | Alan Cox <> | Date | Wed, 24 Aug 2005 22:45:35 +0100 |
| |
On Mer, 2005-08-24 at 12:53 -0700, Jesse Barnes wrote: > writel() ensures ordering? Only from one CPU, another CPU issuing a > write at some later time may have its write arrive first. See > Documentation/io_ordering.txt for some documentation I put together on > this issue.
And in more detail from the deviceiobook..
<para> In addition to write posting, on some large multiprocessing systems (e.g. SGI Challenge, Origin and Altix machines) posted writes won't be strongly ordered coming from different CPUs. Thus it's important to properly protect parts of your driver that do memory-mapped writes with locks and use the <function>mmiowb</function> to make sure they arrive in the order intended. Issuing a regular <function>readX </function> will also ensure write ordering, but should only be used when the driver has to be sure that the write has actually arrived at the device (not that it's simply ordered with respect to other writes), since a full <function>readX</function> is a relatively expensive operation. </para>
- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
| |