Messages in this thread |  | | Date | Fri, 1 Jul 2005 15:25:33 -0400 (EDT) | From | "Richard B. Johnson" <> | Subject | Re: PCI-X support |
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On Fri, 1 Jul 2005, Vojtech Pavlik wrote:
> On Fri, Jul 01, 2005 at 03:02:11PM -0400, Richard B. Johnson wrote: > >> The driver (whatever that is), if it was written for a 64-bit >> platform, can write a 64-bit word in one operation and it's >> transparent. If the driver was written for a 32-bit environment, >> it will still work because there is compatibility with PCI 2.x >> >> FYI, this machine has a PCI-X bus. I have some 32-bit cards >> plugged into it (SCSI controller, etc.). They work. I also >> have a 64-bit card plugged into it (fiber-optic data link). >> It also works, but at 133 MHz. Software never talks to it >> in 'long longs' so the increased data-width isn't being used. > > Are you sure about that? I'd assume when doing busmastering, it'll use > 64-bit transfers, if the driver sets the correct DMA mask. >
Yep. The board uses a PLX PCI 9656BA chip configured for local-bus transfers during DMA The local-bus is 32-bits from a FIFO. There is no way to collapse these writes from the 32-bit source/dest. The transfers are 32 quadwords for a write and 16 quadwords for a read, but that represents a burst, not the data-width. Without a 64-bit data-path to memory on one side, and a 64-bit data-path to the device (a FIFO) on the other side, you will not get 64-bit transfers.
> -- > Vojtech Pavlik > SuSE Labs, SuSE CR > -
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