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SubjectRe: [PATCH] Re: clock runs at double speed on x86_64 system w/ATI RS200 chipset (workaround for APIC mode?)

On Thu, 7 Apr 2005, Andi Kleen wrote:

> >
> > I'm still seeing 'APIC error on CPU0: 00(40)' messages from time to time.
> Thanks for the analysis. The clear_IO_APIC_pin looks quite hackish,
> I am not sure I want to put that into the mainline kernel.

Of course. The patch was a simplification, the idea was to just prevent it
from using the default routing; here's a patch that's functionally
equivalent for me:

--- arch/x86_64/kernel/io_apic.c.orig 2005-03-25 22:28:21.000000000 -0500
+++ arch/x86_64/kernel/io_apic.c 2005-04-07 13:13:58.813193024 -0400
@@ -1564,6 +1564,8 @@
* is so screwy. Thanks to Brian Perkins for testing/hacking this beast
* fanatically on his truly buggy board.
+static int timer_hack = 0;
static inline void check_timer(void)
int pin1, pin2;
@@ -1597,7 +1599,7 @@
* Ok, does IRQ0 through the IOAPIC work?
- if (timer_irq_works()) {
+ if ((!timer_hack) && timer_irq_works()) {
if (nmi_watchdog == NMI_IO_APIC) {
@@ -1669,6 +1671,14 @@
panic("IO-APIC + timer doesn't work! Try using the 'noapic' kernel parameter\n");

+static int __init timerhack(char *str)
+ timer_hack = 1;
+ return 1;
+__setup("timerhack", timerhack);
* IRQ's that are handled by the PIC in the MPS IOAPIC case.

With that patch I get the same behavior; the timer interrupt is labeled
'local-APIC-edge' and it ticks at the correct rate.

> The APIC errors are also suspicious.
> I don't want to blacklist ATI from just a single report,
> but if there are more it is probably best to just disable
> the IO-APIC by default there for now.

It will be interesting to see if anyone else has problems when systems
with this ATI integrated chipset (Radeon Xpress 200) become more common.


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