Messages in this thread Patch in this message | | | Date | Thu, 21 Apr 2005 01:54:15 -0400 | From | Albert Lee <> | Subject | [PATCH] hpt366: HPT372N rev 2 controller fix |
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A particular revision of the HPT372N oopses hpt366 consistently. It's a regression caused by Alan's changes in 2.6.9 to support the HPT372N using only PLL timings. The driver works correctly in prior versions, where the the PCI clock is used instead. This patch restores that behaviour for this particular revision.
More info: http://www.ussg.iu.edu/hypermail/linux/kernel/0410.0/0958.html https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=135515
Please CC replies to me.
-Albert
-- Prediction is very difficult, especially of the future. -- Niels Bohr --- hpt366.c.orig 2004-11-20 17:13:52.280360000 -0500 +++ hpt366.c 2005-04-21 00:40:38.686009488 -0400 @@ -802,6 +802,9 @@ if((did == 4 && rid == 6) || (did == 5 && rid > 1)) is_372n = 1; + /* Check for a HPT372 rev 2, which is a special 372N */ + if(did == 5 && rid == 2) + is_372n = 2; } /* @@ -845,7 +848,25 @@ printk(KERN_INFO "FREQ: %d PLL: %d\n", freq, pll); - /* We always use the pll not the PCI clock on 372N */ + /* We always use the pll not the PCI clock on 372N, + * except for the 372 rev 2, which works fine with 372A + * timings, and needs pci_set_drvdata(). + */ + if(is_372n == 2) + { + if (pll == F_LOW_PCI_33) { + pci_set_drvdata(dev, (void *) thirty_three_base_hpt372); + printk("HPT37X: HPT372 rev 2 detected, using 33MHz PCI clock\n"); + } else if (pll == F_LOW_PCI_40) { + /* Unsupported */ + } else if (pll == F_LOW_PCI_50) { + pci_set_drvdata(dev, (void *) fifty_base_hpt372); + printk("HPT37X: HPT372 rev 2 detected, using 50MHz PCI clock\n"); + } else { + pci_set_drvdata(dev, (void *) sixty_six_base_hpt372); + printk("HPT37X: HPT372 rev 2 detected, using 66MHz PCI clock\n"); + } + } } else {[unhandled content-type:application/pgp-signature] | |