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    Subject[04/11] ppc32: Compilation fixes for Ebony, Luan and Ocotea

    -stable review patch. If anyone has any objections, please let us know.

    ------------------


    From: Matt Porter <mporter@kernel.crashing.org>

    this patch fixes the problem, that the current kernel (linux-2.6.11-rc5)
    could not be compiled, when "support for early boot texts over serial port"
    (CONFIG_SERIAL_TEXT_DEBUG=y) is active.

    Signed-off-by: Gerhard Jaeger <gjaeger@sysgo.com>
    Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
    Signed-off-by: Andrew Morton <akpm@osdl.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
    ---

    25-akpm/arch/ppc/platforms/4xx/ebony.h | 4 ++--
    25-akpm/arch/ppc/platforms/4xx/luan.h | 6 +++---
    25-akpm/arch/ppc/platforms/4xx/ocotea.h | 4 ++--
    3 files changed, 7 insertions(+), 7 deletions(-)

    diff -puN arch/ppc/platforms/4xx/ebony.h~ppc32-compilation-fixes-for-ebony-luan-and-ocotea arch/ppc/platforms/4xx/ebony.h
    --- 25/arch/ppc/platforms/4xx/ebony.h~ppc32-compilation-fixes-for-ebony-luan-and-ocotea 2005-03-04 13:16:17.000000000 -0800
    +++ 25-akpm/arch/ppc/platforms/4xx/ebony.h 2005-03-04 13:16:17.000000000 -0800
    @@ -61,8 +61,8 @@
    */

    /* OpenBIOS defined UART mappings, used before early_serial_setup */
    -#define UART0_IO_BASE (u8 *) 0xE0000200
    -#define UART1_IO_BASE (u8 *) 0xE0000300
    +#define UART0_IO_BASE 0xE0000200
    +#define UART1_IO_BASE 0xE0000300

    /* external Epson SG-615P */
    #define BASE_BAUD 691200
    diff -puN arch/ppc/platforms/4xx/luan.h~ppc32-compilation-fixes-for-ebony-luan-and-ocotea arch/ppc/platforms/4xx/luan.h
    --- 25/arch/ppc/platforms/4xx/luan.h~ppc32-compilation-fixes-for-ebony-luan-and-ocotea 2005-03-04 13:16:17.000000000 -0800
    +++ 25-akpm/arch/ppc/platforms/4xx/luan.h 2005-03-04 13:16:17.000000000 -0800
    @@ -47,9 +47,9 @@
    #define RS_TABLE_SIZE 3

    /* PIBS defined UART mappings, used before early_serial_setup */
    -#define UART0_IO_BASE (u8 *) 0xa0000200
    -#define UART1_IO_BASE (u8 *) 0xa0000300
    -#define UART2_IO_BASE (u8 *) 0xa0000600
    +#define UART0_IO_BASE 0xa0000200
    +#define UART1_IO_BASE 0xa0000300
    +#define UART2_IO_BASE 0xa0000600

    #define BASE_BAUD 11059200
    #define STD_UART_OP(num) \
    diff -puN arch/ppc/platforms/4xx/ocotea.h~ppc32-compilation-fixes-for-ebony-luan-and-ocotea arch/ppc/platforms/4xx/ocotea.h
    --- 25/arch/ppc/platforms/4xx/ocotea.h~ppc32-compilation-fixes-for-ebony-luan-and-ocotea 2005-03-04 13:16:17.000000000 -0800
    +++ 25-akpm/arch/ppc/platforms/4xx/ocotea.h 2005-03-04 13:16:17.000000000 -0800
    @@ -56,8 +56,8 @@
    #define RS_TABLE_SIZE 2

    /* OpenBIOS defined UART mappings, used before early_serial_setup */
    -#define UART0_IO_BASE (u8 *) 0xE0000200
    -#define UART1_IO_BASE (u8 *) 0xE0000300
    +#define UART0_IO_BASE 0xE0000200
    +#define UART1_IO_BASE 0xE0000300

    #define BASE_BAUD 11059200/16
    #define STD_UART_OP(num) \
    _
    -
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