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SubjectRe: Parallel ATA with libata status with the patches I'm working on
While writing the new sl82c05 driver I noticed a real nasty lurking in
the old code. According to the errata docs you have to reset the DMA
engine every transfer to work around chip errata. It also says that this
resets any other ATA transfer in progress.

If both channels are in use there is no locking between the channels to
stop a reset on one channel as DMA begins making a mess of the other
channel. Looks like serialize should be set on the driver ?


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