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SubjectRe: page fault scalability patch final : i386 tested, x86_64 support added
Andi Kleen <ak@muc.de> wrote:
>
> > When can we reasonably expect someone to blow this out of the water?
> > Within the next couple of years, I suspect?
>
> With 4 level page tables x86-64 will support 47 bits virtual theoretical.
> They cannot be used right now because the current x86-64 CPUs have
> 40 bits physical max and it is currently even hardcoded to 40bits,
> but I planned to drop that in the 4 level patch (in fact I already did)
> so that the kernel will in theory support CPUs will more physical memory.
>

hm. What's the maximum virtual size on power5?

> > It does look like we need a new type which is atomic64 on 64-bit and
> > atomic32 on 32-bit. That could be used to fix the
> > mmaping-the-same-page-4G-times-kills-the-kernel bug too.
>
> Yep. Good plan. atomic_long_t ?

Sounds good. Converting page->_count should be fairly straightforward now
too, as it's all done via wrappers.

> >
> > > and this limit actually
> > > mostly comes from the 3-level page table limits.
> >
> > This reminds me - where's that 4-level pagetable patch got to?
>
> It exists on my HD, but is not really finished yet.
>
> I was on vacation and travelling and had some other things to do, so it got
> delayed a bit, but I hope to work on it soon again.

OK, thanks. There's no rush on this one.
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