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    SubjectRe: nmi_watchdog=2 and oprofile - Oops with 2.6.8
    On Thu, 26 Aug 2004 at 22:59 +0000, Zarakin wrote:

    > Oprofile oops'd this time at p4_setup_ctrs - there seems to be one more loop
    > that tries to
    > access MSR_IQ_ESCR0/1. I did a small change myself and it seems to work
    > fine, on both
    > SMP&HT and UP kernels. I was able to start oprofile and get profile sample
    > data.

    Thanks, I missed this one.

    I redo the diff, mangled space in last patch, I added the
    nmi.c:clear_msr_range() fix. It must go in 2.6.9 imho, please
    Andrew apply.

    -- phe

    --- linux-2.5/arch/i386/kernel/nmi.c~ 2004-06-15 10:52:00.000000000 +0200
    +++ linux-2.5/arch/i386/kernel/nmi.c 2004-08-25 17:33:45.000000000 +0200
    @@ -376,7 +376,13 @@
    clear_msr_range(0x3F1, 2);
    /* MSR 0x3F0 seems to have a default value of 0xFC00, but current
    docs doesn't fully define it, so leave it alone for now. */
    - clear_msr_range(0x3A0, 31);
    + if (boot_cpu_data.x86_model >= 0x3) {
    + /* MSR_P4_IQ_ESCR0/1 (0x3ba/0x3bb) removed */
    + clear_msr_range(0x3A0, 26);
    + clear_msr_range(0x3BC, 3);
    + } else {
    + clear_msr_range(0x3A0, 31);
    + }
    clear_msr_range(0x3C0, 6);
    clear_msr_range(0x3C8, 6);
    clear_msr_range(0x3E0, 2);
    --- linux-2.5/arch/i386/oprofile/op_model_p4.c.old 2004-08-25 20:00:56.000000000 +0200
    +++ linux-2.5/arch/i386/oprofile/op_model_p4.c 2004-08-27 18:35:16.000000000 +0200
    @@ -419,9 +419,28 @@
    msrs->controls[i].addr = addr;
    }

    - /* 43 ESCR registers in three discontiguous group */
    + /* 43 ESCR registers in three or four discontiguous group */
    for (addr = MSR_P4_BSU_ESCR0 + stag;
    - addr <= MSR_P4_SSU_ESCR0; ++i, addr += addr_increment()) {
    + addr < MSR_P4_IQ_ESCR0; ++i, addr += addr_increment()) {
    + msrs->controls[i].addr = addr;
    + }
    +
    + /* no IQ_ESCR0/1 on some models, we save a seconde time BSU_ESCR0/1
    + * to avoid special case in nmi_{save|restore}_registers() */
    + if (boot_cpu_data.x86_model >= 0x3) {
    + for (addr = MSR_P4_BSU_ESCR0 + stag;
    + addr <= MSR_P4_BSU_ESCR1; ++i, addr += addr_increment()) {
    + msrs->controls[i].addr = addr;
    + }
    + } else {
    + for (addr = MSR_P4_IQ_ESCR0 + stag;
    + addr <= MSR_P4_IQ_ESCR1; ++i, addr += addr_increment()) {
    + msrs->controls[i].addr = addr;
    + }
    + }
    +
    + for (addr = MSR_P4_RAT_ESCR0 + stag;
    + addr <= MSR_P4_SSU_ESCR0; ++i, addr += addr_increment()) {
    msrs->controls[i].addr = addr;
    }

    @@ -553,7 +572,18 @@

    /* clear all escrs (including those outside our concern) */
    for (addr = MSR_P4_BSU_ESCR0 + stag;
    - addr <= MSR_P4_SSU_ESCR0; addr += addr_increment()) {
    + addr < MSR_P4_IQ_ESCR0; addr += addr_increment()) {
    + wrmsr(addr, 0, 0);
    + }
    +
    + /* On older models clear also MSR_P4_IQ_ESCR0/1 */
    + if (boot_cpu_data.x86_model < 0x3) {
    + wrmsr(MSR_P4_IQ_ESCR0, 0, 0);
    + wrmsr(MSR_P4_IQ_ESCR1, 0, 0);
    + }
    +
    + for (addr = MSR_P4_RAT_ESCR0 + stag;
    + addr <= MSR_P4_SSU_ESCR0; ++i, addr += addr_increment()) {
    wrmsr(addr, 0, 0);
    }

    -
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