Messages in this thread Patch in this message | | | Subject | PATCH: missing CPU descriptors | From | Alan Cox <> | Date | Fri, 20 Aug 2004 14:32:32 +0100 |
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There are a couple of cache descriptors in the current Intel manuals missing from our tables at least one of which appears in an actual processor in the real world.
--- arch/i386/kernel/cpu/intel.c~ 2004-08-20 05:52:49.000000000 +0100 +++ arch/i386/kernel/cpu/intel.c 2004-08-20 05:52:49.000000000 +0100 @@ -97,10 +97,12 @@ { 0x70, LVL_TRACE, 12 }, { 0x71, LVL_TRACE, 16 }, { 0x72, LVL_TRACE, 32 }, + { 0x78, LVL_2, 1024 }, { 0x79, LVL_2, 128 }, { 0x7a, LVL_2, 256 }, { 0x7b, LVL_2, 512 }, { 0x7c, LVL_2, 1024 }, + { 0x7d, LVL_2, 2048 }, { 0x82, LVL_2, 256 }, { 0x83, LVL_2, 512 }, { 0x84, LVL_2, 1024 }, | |