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SubjectRe: [PATCH] dothan speedstep fix
On Fri, Aug 20, 2004 at 04:54:46PM +1000, Con Kolivas wrote:

> Now all I need is for a way to make it report the correct L2 cache.

How's this look ?

Dave

Update Intel cache descriptor decoding to match latest
Intel Documentation (24161827.pdf)

Signed-off-by: Dave Jones <davej@redhat.com>

--- FC2/arch/i386/kernel/cpu/intel.c~ 2004-08-20 15:15:32.049821280 +0100
+++ FC2/arch/i386/kernel/cpu/intel.c 2004-08-20 15:17:34.407220128 +0100
@@ -96,10 +96,13 @@
{ 0x70, LVL_TRACE, 12 },
{ 0x71, LVL_TRACE, 16 },
{ 0x72, LVL_TRACE, 32 },
+ { 0x78, LVL_2, 1024 },
{ 0x79, LVL_2, 128 },
{ 0x7a, LVL_2, 256 },
{ 0x7b, LVL_2, 512 },
{ 0x7c, LVL_2, 1024 },
+ { 0x7d, LVL_2, 2048 },
+ { 0x7f, LVL_2, 512 },
{ 0x82, LVL_2, 256 },
{ 0x83, LVL_2, 512 },
{ 0x84, LVL_2, 1024 },
-
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