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SubjectRe: timer + fpu stuff locks up computer
On Sun, Jun 13, 2004 at 12:08:10AM +0200, Andi Kleen wrote:
> One problem on 486s/P5s would be the race that is described in D.2.1.3
> of Volume 1 of the Intel architecture manual when the FPU is in MSDOS
> compatibility. When that happens we can still get the exception later
> (e.g. on a following fwait which the kernel can still execute). The
> only way to handle that would be to check in the exception handler,
> like my patch did.

But in head.S we set the NE flag in CR0 for all 486 or better
processors, so the MSDOS compatibility mode is not used, and we don't
need to care about this race.

> However my patch was also not complete, since it
> didn't handle it for all fwaits in the kernel.

Looked at your patch... I was also thinking about something similar.

You treat exception 16 and IRQ13 the same - is this really correct?
Asynchronous IRQ13 might break things. But this would be visible only
on a real 80386+80387 - does someone still have such hardware? ;)
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