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From
SubjectRe: IO-APIC on nforce2 [PATCH] + [PATCH] for nmi_debug=1 + [PATCH] for idle=C1halt, 2.6.5
Date
On Tuesday 04 May 2004 08:09, Allen Martin wrote:
> I'm happy to be able to make this information public to the Linux
> community. This information has been previously released to BIOS /
> board vendors as an appnote, but in the interest of getting a workaround
> into the hands of users the quickest we're making it public for possible
> inclusion into the Linux kernel.
>
<snip>

Thank you very much Allen for being involved in linux development.
Obsolecense is the best ending a temporary workaround could have.

I think I have found the problem with the Albatron KM18G-pro Mobos I have been
using.

They can't see through their Windows.??!@@#$$%%&*&

ML1-0505-19 Re: Cause of lockups with KM-18G Pro is incorrect pci reg values in bios -please update bios

From:
"dr.pro" <dr.pro@albatron.com.tw>

To:
<ross@datscreative.com.au>

Date:
Today 17:38:08

Dear Ross,

Thank you very much for contacting Albatron technical support.

KM18G Pro has been proved under Windows 98SE/ME/2000/XP but Linux, so you
may encounter problems with it under Linux. We suggest you use Windows
98SE/ME/2000/XP for the stable performance. Sorry for the inconvenience and
please kindly understand it.

Please let us know if you have any question.

Best regards,
Dr.Pro
----- Original Message -----
From: "Ross Dickson" <ross@datscreative.com.au>
To: <dr.pro@albatron.com.tw>
Sent: Tuesday, May 04, 2004 8:19 PM
Subject: Cause of lockups with KM-18G Pro is incorrect pci reg values in
bios -please update bios

> Greetings,
>
> The following is required for Linux to function correctly on your KM-18G
Pro.
>
> Allen Martin of Nvidia explains.
>
> I'm happy to be able to make this information public to the Linux
> community. This information has been previously released to BIOS /
> board vendors as an appnote, but in the interest of getting a workaround
> into the hands of users the quickest we're making it public for possible
> inclusion into the Linux kernel.
>
>
> Problem:
> C1 Halt Disconnect problem on nForce2 systems
>
> Description:
> A hang is caused when the CPU generates a very fast CONNECT/HALT cycle
> sequence.
>
> Workaround:
> Set the SYSTEM_IDLE_TIMEOUT to 80 ns. This allows the state-machine and
> timer to return to a proper state within 80 ns of the CONNECT and probe
> appearing together.
>
> Since the CPU will not issue another HALT within 80 ns of the initial
> HALT, the failure condition is avoided.
>
> This will require changing the value for register at bus:0 dev:0 func:0
> offset 6c.
>
> Chip Current Value New Value
> C17 1F0FFF01 1F01FF01
> C18D 9F0FFF01 9F01FF01
>
> Northbridge chip version may be determined by reading the PCI revision
> ID (offset 8) of the host bridge at bus:0 dev:0 func:0. C1 or greater
> is C18D.
>
> Regards
> Ross Dickson
>
>
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