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SubjectRe: scheduler: IRQs disabled over context switches
On Mon, 24 May 2004, Ingo Molnar wrote:

> * Russell King <> wrote:
> > The 2.6.6 scheduler disables IRQs across context switches, which is
> > bad news for IRQ latency on ARM - to the point where 16550A FIFO UARTs
> > to overrun.
> >
> > I'm considering defining prepare_arch_switch & co as follows on ARM,
> > so that we release IRQs over the call to context_switch().
> > The question is... why are we keeping IRQs disabled over
> > context_switch() in the first case? Looking at the code, the only
> > thing which is touched outside of the two tasks is rq->prev_mm. Since
> > runqueues are CPU- specific and we're holding at least one spinlock, I
> > think the above is preempt safe and SMP safe.
> historically x86 context-switching has been pretty fragile when done
> with irqs enabled. (x86 has tons of legacy baggage, segments, etc.) It's
> also slightly faster to do the context-switch in one atomic swoop. On
> x86 we do this portion in like 1 usec so it's not a latency issue.

We used to do it in 2.4. What changed to make it fragile? The threading
(TLS) thing?

- Davide

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