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SubjectRE: spurious 8259A interrupt
On Tue, 16 Mar 2004 wrote:

> > Sometimes the processor would unmask IRQ10 almost immediately after
> reading the status
> > register in the NIC, which results in IRQ10 being unmasked before the
> IRQ10 signal has
> > finished going high. This causes the PIC to think that there is
> another IRQ10, but,
> > by the time the processor asks for the vector, IRQ10 is no longer
> asserted.
> The PIC defaults to IRQ7 because of its design, when IRQ10 was already
> cleared. Sticking delays in is not viable in a generic ISR routing. A
> possible fix to this issue would be to issue the EOI after the read to
> the status register on the NIC, and I see some documentation on the PIC
> that actually suggests that this is the way to service an interrupt.
> This seemed like a risky change, since sending the EOI and using the
> mask has been in use for some time and the change would effect all
> devices using interrupts.

The best way to deal with spurious interrupts is to ack the interrupt at
the device ASAP in the handler, especially if you know that the response
is slow.

+ Maciej W. Rozycki, Technical University of Gdansk, Poland +
+ e-mail:, PGP key available +
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