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SubjectRe: page fault scalability patch V12 [0/7]: Overview and performance tests
On Thu, 2004-12-02 at 02:00 -0500, Jeff Garzik wrote:

> 2.6.9:
> bitbang ATA taskfile registers
> queue_work()
> workqueue thread bitbangs ATA data register (read id page)
> So I wonder if <something> doesn't like CPU 0 sending I/O traffic to the
> on-board SATA PCI device, then immediately after that, CPU 1 sending I/O
> traffic.
> Anyway, back to debugging... :)

They may not end up in order if they are stores (the stores to the
taskfile may be out of order vs; the loads/stores to/from the data
register) unless you have a spinlock protecting both or a full sync (on
ppc), but then, I don't know the ordering things on x86_64. This could
certainly be a problem on ppc & ppc64 too.


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