Messages in this thread | | | Date | Mon, 25 Oct 2004 09:28:13 -0600 | From | Chris Friesen <> | Subject | Re: How is user space notified of CPU speed changes? |
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Lee Revell wrote: > On Fri, 2004-10-22 at 13:40 -0600, Chris Friesen wrote: >>x86 really could use an on-die register that increments at 1GHz independent of >>clock speed and is synchronized across all CPUs in an SMP box. > > > Like this? (posted to jackit-devel): > > On Fri, 2004-10-22 at 18:20 -0500, Jack O'Quin wrote: >>On PowerPC, JACK uses the lower half of the 64-bit Timebase register, >>which is accessible from user mode. This is better then the i386 >>cycle counter, I believe.
Yes, ppc tbr is nice. It's actually lower resolution than the x86 one, but it might be better for smp and freq changes--not sure.
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