Messages in this thread | | | Date | Wed, 7 Jan 2004 16:34:49 -0800 | Subject | Re: [RFC] Relaxed PIO read vs. DMA write ordering | From | (Jesse Barnes) |
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On Wed, Jan 07, 2004 at 03:56:33PM -0800, Jesse Barnes wrote: > On Wed, Jan 07, 2004 at 03:27:54PM -0800, Greg KH wrote: > > On Wed, Jan 07, 2004 at 03:07:12PM -0800, Jesse Barnes wrote: > > > > > > 1) add pcix_enable_relaxed() and read_relaxed() (read() would always be > > > ordered) > > > > This probably preserves the current situation best, enabling driver > > writers to be explicit in knowing what is happening.
This is also the easiest solution to implement for the sn2 platform. Honestly, I haven't used any PCI-X chipsets (nor do I know of any) that exploit this new relaxed ordering feature, so I'm only guessing at how it might be usefully exported to the driver API.
The sn2 platform actually _always_ behaves as though relaxed ordering were enabled, so all we really need to implement this correctly is a read_relaxed(), which will be a read() but without the software workaround we put in place to conform to the PCI PIO/DMA semantics.
Maybe we can just add read_relaxed() for now and deal with other chipsets that allow relaxed ordering as they appear?
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